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38 /*!
39 * ======== ti.sdo.ce.image1.IIMGENC1 ========
40 * IIMGENC1-compliant image decoder interface
41 *
42 * All IIMGENC1-compliant image decoder modules must implement this
43 * interface.
44 */
45 metaonly interface IIMGENC1 inherits ti.sdo.ce.ICodec
46 {
47 override config String serverFxns = "IMGENC1_SKEL";
48 override config String stubFxns = "IMGENC1_STUBS";
49
50 override readonly config Int rpcProtocolVersion = 1;
51
52 override readonly config Bool codecClassConfigurable = true;
53
54 /*!
55 * ======== manageInBufsCache =======
56 * Codec Class configuration param
57 *
58 * Determines whether cache will be managed on the DSP for each of the
59 * (up to 16) input buffers given to the codec's "process()" call.
60 *
61 * If this flag is set to "false" for one or more
62 * elements, the cache for the corresponding input buffer will not be
63 * invalidated before the process() call. Skipping unnecessary cache
64 * invalidation improves performance, especially if a buffer is large.
65 *
66 * (If element "i" in this array is set to true, cache for inBufs[i] will
67 * be invalidated only if the buffer is supplied, of course.)
68 *
69 * For example, if you know that a particular codec of this class always
70 * reads the data from its inBufs[1] buffer only via DMA, you can set
71 * manageInBufsCache[1] = false;
72 */
73 config Bool manageInBufsCache[ 16 ] = [
74 true, true, true, true, true, true, true, true,
75 true, true, true, true, true, true, true, true,
76 ];
77
78 /*!
79 * ======== manageOutBufsCache =======
80 * Codec Class configuration param
81 *
82 * Determines whether cache will be managed on the DSP for each of the
83 * (up to 16) output buffers given to the codec's "process()" call.
84 *
85 * If this flag is set to "false" for one or more
86 * elements, the cache for the corresponding output buffer will not be
87 * invalidated before the process() call.
88 * Skipping unnecessary cache invalidation improves
89 * performance. Whether the buffer will be written back after the process()
90 * call depends on the algorithm and cannot be controlled here.
91 *
92 * For example, if you know that a particular codec of this class always
93 * writes the data to its outBufs[2] buffer only via DMA, you can set
94 * manageOutBufsCache[2] = false;
95 */
96 config Bool manageOutBufsCache[ 16 ] = [
97 true, true, true, true, true, true, true, true,
98 true, true, true, true, true, true, true, true,
99 ];
100 }
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